In the fabrication of semiconductor devices such as integrated circuits, memory cells, and the like, a series of manufacturing operations are performed to define features on semiconductor wafers. The semiconductor wafers include integrated circuit devices in the form of multi-level structures defined on a silicon substrate. At a substrate level, transistor devices with diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define a desired integrated circuit device. Also, patterned conductive layers are insulated from other conductive layers by dielectric materials.
Reliably producing sub-micron and smaller features is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI) of semiconductor devices. However, the shrinking dimensions of interconnect in VLSI and ULSI technologies have placed additional demands on the processing capabilities. As circuit densities increase, the widths of vias, contacts and other features, as well as the dielectric materials between them, decrease to sub-micron dimensions (e.g., less than 0.10 micrometers or less), whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increase. Many traditional deposition processes have difficulty achieving substantially void-free and seam-free filling of sub-micron structures where the aspect ratio exceeds 4:1.
Currently, copper and its alloys have become the metals of choice for sub-micron interconnect technology due to its lower resistivity. One problem with the use of copper is that copper diffuses into silicon, silicon dioxide, and other dielectric materials, which may compromise the integrity of devices. Conformal barrier layers can be used to prevent copper diffusion. Copper might not adhere well to the barrier layer; therefore, a liner layer might need to be deposited between the barrier layer and copper. Conformal deposition of the barrier layer and liner layer is important to provide good step coverage to assist copper adhesion and/or deposition.
In view of the foregoing, there is a need for apparatus and methods of depositing conformal thin film in interconnect structures.